Senior CPU RTL Design Engineer, Silicon
Google
Full-time
On-site
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 8 years of experience in microprocessor architecture through coursework or industry experience.
- Experience in logic design through coursework or industry experience.
Preferred qualifications:
- Master’s or PhD degree in Electrical Engineering or Computer Science.
- Experience with modern processor microarchitecture and related technologies and algorithms, through academic projects or industry experience.
- Knowledge of programming languages, such as C, C++, and Python.
- Knowledge of general purpose operating systems, such as Linux or Android.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. The Platforms and Devices team encompasses Google's various computing software platforms across environments (desktop, mobile, applications), as well as our first party devices and services that combine the best of Google AI, software, and hardware. Teams across this area research, design, and develop new technologies to make our user's interaction with computing faster and more seamless, building innovative experiences for our users around the world.Responsibilities
- Contribute to Central Processing Unit (CPU) front-end designs, emphasizing microarchitecture and Register-Transfer Level (RTL) design for the next-generation CPU.
- Propose efficient, performance-enhancing microarchitecture features, working with architects and performance teams to conduct trade-off studies, communicate their pros and cons, and facilitate final decisions.
- Deliver designs meeting Power, Performance, and Area (PPA) goals with production quality.
- Become familiar with techniques for at least one processor functional block, and interpret these techniques into design constructs and languages to provide guidance to and participate in the performance modeling effort.
- Work closely with the functional verification team to ensure production quality designs, and with the physical design team to meet frequency, power, and area goals.